The present application is directed to isolated gate drive circuits which are employed to control the operation of semiconductor switches. Isolation is frequently desirable when controlling semiconductor switches. Examples of situations where isolation is desirable include when voltages being switched by a semiconductor switch are relatively high compared to those employed in the control circuit controlling the operation of the semiconductor switch or when a “floating” semiconductor switch is used or if drive is to be effected across an isolation boundary.
A common approach to driving the gate of a semiconductor switch, such as a MOSFET, employs a drive transformer in which a drive signal is generated and applied to the primary side winding of the drive transformer. The output from a secondary winding of the drive transformer is used to provide a turn-on voltage to the gate of the semiconductor switch. In this configuration, the width of the drive signal Tdrive substantially determines the ON time TON of the semiconductor switch, i.e. the semiconductor switched is caused to be turned on at the start of Tdrive and once the Tdrive finishes the semiconductor switch starts to turns off. A disadvantage of this approach is that a relatively large transformer is required. Additionally, the transformer requires equal and opposite volt seconds for both applying the ON pulse and resetting the transformer. Indeed the need to ensure this reset condition can complicate designs. A further problem is that the use of a capacitor is generally required on both the primary and secondary sides. It will be appreciated that including such capacitors in a design generally precludes the design from implementation in silicon. It also has adverse consequences for the dynamic behaviour of the circuit under start-up and other conditions requiring rapid change of duty cycles, given that such capacitors typically need to charge to a mean voltage level depending on duty cycle.
A less common approach and the one which is employed generally in the present application is to employ a drive circuit in which a first pulse is provided to turn on the semiconductor switch through a first transformer (turn-on transformer). In contrast to the previously described approach, the duration of the pulse does not dictate the ON time of the semiconductor switch. A separate pulse is employed through a second transformer (turn-off transformer) to cause a reset circuit to turn off the semiconductor switch. As a result, the ON time of the semiconductor switch is dictated by the delay between the first and second pulses. An exemplary arrangement for such an isolated gate drive circuit is shown in FIG. 1 for the operation of a switch 2 for switchably connecting a first node (A) to a second node (B).
In this circuit 1, a first control pulse, hereinafter referred to as an ‘ON’ pulse, is generated by a control circuit 18 and applied to the primary windings 4a of a first pulse transformer 4 in the exemplary circuit by means of a switch 5 connecting the primary between a supply voltage 7 of the control circuit (frequently referred to as a bias rail) and a control circuit ground 9 in response to a control signal from the control circuit 18.
Typically the ‘ON’ pulse may have a duration of between 20 ns and 100 ns. The output from the secondary winding 4b of the first pulse transformer is provided across the gate and source of the semiconductor switch 2, which may for example be a MOSFET, IGBT or similar voltage driven semiconductor switch. For the purposes of explanation, the operation of the circuit will now be described in the context of where the semiconductor switch is a MOSFET 2. One side of the secondary winding 4b is connected directly to the source of the MOSFET. The other side of the secondary winding 4b is connected through a rectifier 8 to the gate of the MOSFET. When an ON pulse is applied to the primary winding 4a of the first pulse transformer, a corresponding pulse is presented on the secondary winding which is directed to the gate of the MOSFET through the rectifier 8 turning the MOSFET on. Because of the presence of the rectifier 8 the gate capacitance holds the pulse voltage thus maintaining the MOSFET in an ON state once the ON pulse has finished. As a result, the duration of Ton is not dictated by the length of the ON pulse, thus allowing for a shorter duration pulse to be employed. A resistor 12 is provided in series with the rectifier 8 to limit the current. The resistance value of the resistor may be selected to slow the rise time of voltage on the gate of the MOSFET2 for EMI purposes. A rectifier (reset diode) 13 may be provided across the windings of the transformer to provide a path when the ON pulse finishes and the first switch turns off.
As the rectifier 8 effectively stops the MOSFET resetting when the ON pulse is removed, a separate reset circuit is provided to turn off the MOSFET. The reset circuit generally comprises a second pulse transformer 6. A primary winding 6a of this second pulse transformer is driven with a pulse, hereinafter referred to as an ‘OFF’ pulse from the control circuit 18, which in the case of the exemplary circuit is by means of a second switch 11 connecting the primary winding of the second transformer between a supply voltage 7 of the control circuit (frequently referred to as a bias rail) and a control circuit ground 9 in response to a control signal from the control circuit 18. A rectifier (reset diode) 15 may be provided across the windings of the transformer to provide a path when the OFF pulse finishes and the second switch 11 turns off. Usage of reset diodes 13, 15 limits voltage stress on switches 5 and 11, and usage of these diodes with the corresponding low reset voltage is feasible as the duty cycles are very low. The low values of reset voltage are also conducive to implementation of the semiconductor drive elements in integrated-circuit form.
The ‘OFF’ pulse has a comparable duration to the ‘ON’ pulse. The secondary winding of the second pulse transformer provides a pulse to the gate of a second semiconductor switch 10, which may be a small MOSFET. This second switch is connected across the gate and source of the first MOSFET 2. The ‘OFF’ pulse thus turns on the second switch 10 which provides a path for the gate capacitance of the first MOSFET to discharge thus turning off the first MOSFET 2. A resistor 14 may be provided in series with the second switch 10 to limit the speed of turn-off for EMI or other purposes. A disadvantage of this configuration is that there is a high impedance condition in either state between switching instants, which can render the device susceptible to conditions of spurious turn-on when the device has been commanded to be “off”. This can be addressed in part by fitting a further resistor 16 across the gate and source of the MOSFET 2. However, whilst a low value of resistance is desirable for noise immunity using a low value of resistance for resistor 16 causes material losses when the gate of the MOSFET 2 is driven high.
One problem with the arrangement is that significant energy is required to cause the semiconductor switch to turn ON, with most of this energy wasted in the resistor 12. Eliminating the resistor does not solve the problem as the energy wastage is simply transferred to the rectifier 8 and problems of excessive current and EMI are introduced. Whilst these losses may be acceptable in low frequency switching circuits, the losses increase directly with frequency and as a result, the use of pulse transformer circuits in this manner is less desirable at higher frequencies because of poor efficiency and the requirement to dissipate heat generated in the drive and reset circuits.